Campuses:

Accelerating Shallow Water Modeling

Wednesday, October 15, 2014 - 11:30am - 12:20pm
Lind 305
Timothy Warburton (Rice University)
The current trends in processor architecture design are driven by the end of so called era of Dennard scaling in around 2005. Thermal power dissipation issues associated with increasing processor clock frequency has instead led to processors being designed with many compute cores equipped with ever more numerous and wider vector units. The advent of massively parallel compute processors including graphics processing units and accelerators offers a window into the progression of compute platforms over the next decade. The most advanced GPUs include thousands of floating point units.

Predictive simulation frameworks are themselves becoming more complex. As we design simulation tools for the next decade it is vital to take into account the trends in processor design. Fundamental design decisions made in the early stages of framework design will strongly impact the flexibility to fully utilize the potential of massively parallel processors. The choice of core numerical discretizations, their structure, and algorithmic detail are obvious issues to contend with. It is also becoming apparent that we need to proactively hedge against uncertainty in both future processor architectures and in the programming models that are best suited to attain high-performance.

In this talk I will discuss our progress in building a shallow water solver using discontinuous Galerkin methods and the rationale behind choosing these methods. I will elaborate on our approach to future proofing the solvers against changes both in processor architecture and in best practices for programming massively parallel devices using our unified and extensible OCCA many-core programming library.
MSC Code: 
76B15
Keywords: