A Code Generation and Autotuning Framework For Parallel Iterative Stencil Computations on Modern Microarchitectures

Tuesday, January 11, 2011 - 9:30am - 10:30am
Keller 3-180
Olaf Schenk (Universität Basel)
Stencil calculations comprise an important class of kernels in many scientific computing applications

ranging from simple PDE solvers to constituent kernels in multigrid methods as well as image processing applications. In such types of solvers, stencil kernels are often the dominant part of the computation, and an efficient parallel implementation of the kernel is therefore crucial in order to reduce the time to solution.

However, in the current complex hardware microarchitectures, meticulous architecture-specific tuning is required to elicit the machine's full compute power. We present a code generation and auto-tuning framework PATUS for stencil computations targeted at multi- and manycore processors, such as multicore CPUs and graphics processing units, which makes it possible to generate compute kernels from a specification of the stencil operation and a parallelization and optimization strategy, and leverages the autotuning methodology to optimize strategy-dependent parameters for the given hardware architecture.